ECL (emitter-coupled logic) is a type of integrated circuit logic which uses bipolar transistors. CMOS is another type of integrated circuit logic, however CMOS uses complementary MOSFET transistors. ECL circuits have the advantage of high speed, but they consume a large amount of power. CMOS logic circuits have the advantages of low power dissipation, high input resistance, low output resistance, and low noise generation. Combining ECL and CMOS on an integrated circuit therefore provides the important advantages of high speed and low power consumption. ECL is used in those circuit portions requiring higher processing speeds. CMOS is used to reduce power consumption in those circuit portions that are less time-critical.
ECL has short switching times because the swing between high and low logic states is only about one volt. ECL signal levels, referenced to a power supply voltage terminal commonly labeled V.sub.DD, are approximately V.sub.DD minus V.sub.BE for a logic high voltage, and V.sub.DD minus 2V.sub.BE for a logic low voltage, where V.sub.BE is the forward biased base-emitter diode voltage drop of a corresponding bipolar transistor. In contrast, CMOS logic states may swing the full rail of the power supply voltage, or approximately 5 volts. When CMOS levels are applied to a base of a bipolar transistor in an ECL logic circuit, reliability problems can result because of the differences in logic levels. A large reverse bias occurs if a CMOS logic low voltage (about V.sub.SS) is applied to the base of an input bipolar transistor while the emitter is held at or near V.sub.DD.
When a large reverse bias is applied across the base-emitter junction of a bipolar transistor, degradation of the transistor occurs. Over time, the constant application of this large reverse bias may cause the input bipolar transistor to fail, resulting in a failure of the entire integrated circuit. Electronically, a large reverse bias on a PN junction causes hot carrier injection into the overlying oxide, resulting in poor junction performance. See, for example, "Hot-Carrier Degradation in Bipolar Transistors at 300 and 110K--Effect on BiCMOS Inverter Performance", by Burnett and Hu in IEEE Transactions on Electron Devices, vol. 37, no. 4, April 1990, pp. 1171-1173. The amount of hot carrier injection is proportional to the duration of the reverse bias. The voltage differential of the reverse bias is related to the mean life of the transistor, for given worst case conditions, by an inverse semilogarithmic relationship. Thus, under worst case conditions, the reverse bias decreases linearly as the mean life increases exponentially.
Bipolar transistors can be manufactured using different process technologies. One type of process technology produces diffused junction bipolar transistors, whereas a newer type of process technology produces polysilicon-emitter bipolar transistors. Polysilicon transistors are smaller and have faster switching times than corresponding diffusion bipolar transistors having approximately the same beta (.beta.). Diffused junction transistors have relatively light doping and large base-emitter junctions, while polysilicon transistors are heavily doped with smaller base-emitter junctions. As doping densities increase, the width of the junction decreases. An electric field is created at the base-emitter junction when the transistor is reverse biased. The electric field is equal to the voltage across the junction divided by the width of the junction. Accordingly, it follows that the smaller the width of the junction, the larger the electric field for a given junction voltage. Therefore, a diffusion bipolar transistor with its relatively wide base-emitter junction can withstand a larger reverse bias, without suffering degradation, than a corresponding polysilicon bipolar transistor with a narrow base-emitter junction.